Rainbow-electronics DS2172 Instrukcja Użytkownika

Copyright 1997 by Dallas Semiconductor Corporation.All Rights Reserved. For important information regardingpatents and other intellectual property r

DS2172031197 10/20PSEUDORANDOM PATTERN GENERATION (PCR.5=1) Table 4PATTERN TYPE PTR PLR PSR3 PSR2 PSR1 PSR0 TINV RINV23 – 1 00 02 FF FF FF FF 0 024 –

DS2172031197 11/20REPETITIVE PATTERN GENERATION (PCR.5=0) Table 5PATTERN TYPE PTR PLR PSR3 PSR2 PSR1 PSR0 TINV RINVall ones 00 00 FF FF FF FF 0 0all z

DS2172031197 12/20BC15 BC14 BC13 BC12 BC11 BC10 BC9 BC8BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC09.0 BIT ERROR COUNT REGISTERSThe Bit Error Count Registers (BE

DS2172031197 13/20SR: STATUS REGISTER (Address=14 Hex)(MSB) (LSB)–RA1 RA0 RLOS BED BCOF BECOF SYNCSYMBOL POSITION NAME AND DESCRIPTION– SR.7 Not Assig

DS2172031197 14/2012.0 AC TIMING AND DC OPERATING CHARACTERISTICSABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground –1.0V to +7.0VOperatin

DS2172031197 15/20AC CHARACTERISTICS – PARALLEL PORT (0°C to 70°C; VDD=5V ± 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESCycle Time tCYC200 nsPulse Wid

DS2172031197 16/20INTEL BUS READ AC TIMING (BTS=0) Figure 3 tCYC tASED PWEH PWEL tCS PWASH tDDR tAHL tDHR tCH tASL tASD tASDALEWRRDCSAD0–AD7INTEL BUS

DS2172031197 17/20MOTOROLA BUS AC TIMING (BTS=1) Figure 5 tASED PWEH PWEL tCYC tDSW PWASHtASDtRWStRWHtDHRtDDRtAHLtASLtAHLtDHWtCHtASL tCSASDSR/WAD0–AD7

DS2172031197 18/20AC CHARACTERISTICS – RECEIVE SIDE (0°C to 70°C; VDD=5V ± 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESRCLK Period tCP19 nsRCLK Pulse

DS2172031197 19/20RECEIVE AC TIMING Figure 6 tR tF tSU1 tSU2 tHD1 tHD2 tWRL tCP tCH tCLRCLKRDATARDISRL/LCTRANSMIT AC TIMING Figure 7TCLKTDATATDISSEE N

DS2172031197 2/201.0 GENERAL OPERATION1.1 Pattern GenerationThe DS2172 is programmed to generate a particulartest pattern by programming the followi

DS2172031197 20/20DS2172 32–PIN TQFPGAUGE

DS2172031197 3/20DS2172 FUNCTIONAL BLOCK DIAGRAM Figure 1BTS RD WR TEST ALE CS INT AD0–AD7PARALLEL CONTROL PORTPATTERNGENERATORERRORINSERTIONTRANSMITR

DS2172031197 4/20DETAILED PIN DESCRIPTION Table 1PIN SYMBOL TYPE DESCRIPTION1 TL I Transmit Load. A positive–going edge loads the pattern generator w

DS2172031197 5/20PIN DESCRIPTIONTYPESYMBOL24 RL I Receive Load. A positive–going edge loads the previous 32 bits of datareceived at RDATA into the Pat

DS2172031197 6/20DS2172 REGISTER MAP Table 2ADDRESS R/W REGISTER NAME00 R/W Pattern Set Register 3.01 R/W Pattern Set Register 2.02 R/W Pattern Set Re

DS2172031197 7/20PATTERN SET REGISTERS (MSB) (LSB)PS31PS30 PS29 PS28 PS27 PS26 PS25 PS24PS23 PS22 PS21 PS20 PS19 PS18 PS17 PS16PS15 PS14 PS13 PS12

DS2172031197 8/20PT3 PTR.3 Polynomial Tap Bit 3.PT2 PTR.2 Polynomial Tap Bit 2.PT1 PTR.1 Polynomial Tap Bit 1.PT0 PTR.0 Polynomial Tap Bit 0.6.0

DS2172031197 9/207.0 ERROR INSERT REGISTERThe Error Insertion Register (EIR) controls circuitrywithin the DS2172 that allows the generated pattern to