Rainbow-electronics DS2180A Instrukcja Użytkownika

Przeglądaj online lub pobierz Instrukcja Użytkownika dla Komunikacja Rainbow-electronics DS2180A. Rainbow Electronics DS2180A User Manual Instrukcja obsługi

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 36
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 0
Copyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
DS2180A
T1 Transceiver
DS2180A
041995 1/36
FEATURES
Single chip DS1 rate transceiver
Supports common framing standards
12 frames/superframe “193S”
24 frames/superframe “193E”
Three zero suppression modes
B7 stuffing
B8ZS
Transparent
Simple serial interface used for configuration, control
and status monitoring in “processor” mode
“Hardware” mode requires no host processor; in-
tended for stand-alone applications
Selectable 0, 2, 4, 16 state robbed bit signaling modes
Allows mix of “clear” and “non-clear” DS0 channels on
same DS1 link
Alarm generation and detection
Receive error detection and counting for transmission
performance monitoring
5V supply, low-power CMOS technology
Surface mount package available, designated
DS2180AQ
Industrial temperature range of -40°C to +85°C avail-
able, designated DS2180AN or DS2180AQN
Compatible to DS2186 Transmit Line Interface,
DS2187 Receive Line Interface, DS2188 Jitter Atten-
uator, DS2175 T1/CEPT Elastic Store, DS2290 T1
Isolation Stik, and DS2291 T1 Long Loop Stik
DESCRIPTION
The DS2180A is a monolithic CMOS device designed to
implement primary rate (1.544 MHz) T-carrier transmis-
sion systems. The 193S framing mode is intended to
support existing Ft/Fs applications (12 frames/super-
frame). The 193E framing mode supports the extended
superframe format (24 frames/superframe). Clear
channel capability is provided by selection of appropri-
ate zero suppression and signaling modes.
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 21
22
23
24
40-Pin DIP (600 MIL)
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TMSYNC
TFSYNC
TCLK
TCHCLK
TSER
TMO
TSIGSEL
TSIGFR
TABCD
TLINK
TLCLK
TPOS
TNEG
INT
SDI
SDO
CS
SCLK
SPS
VSS
VDD
RLOS
RFER
RBV
RCL
RNEG
RPOS
RST
TEST
RSIGSEL
RSIGFR
RABCD
RMSYNC
RFSYNC
RSER
RCHCLK
RCLK
RLCLK
RLINK
RYEL
INT
RST
44-PIN PLCC
NC
TCHCLK
TCLK
NC
TFSYNC
TMSYNC
VDD
RLOS
RFER
RBV
RCL
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18 19 20 21 22 23 24 25 26 27 28
6543214443424140
RNEG
RPOS
TEST
RSIGSEL
RSIGFR
RABCD
RMSYNC
RFSYNC
RSER
RCHCLK
TSER
TMO
TSIGSEL
TSIGFR
TABCD
TLINK
TLCLK
TPOS
TNEG
SDI
SDO
CS
SCLK
SPS
VSS
RYEL
RLINK
NC
RLCLK
RCLK
NC
Przeglądanie stron 0
1 2 3 4 5 6 ... 35 36

Podsumowanie treści

Strona 1 - T1 Transceiver

Copyright 1995 by Dallas Semiconductor Corporation.All Rights Reserved. For important information regardingpatents and other intellectual property r

Strona 2 - 041995 2/36

DS2180A041995 10/36TRANSMIT INSERTION HIERARCHY Figure 8F-BITIDLECLEARSIGB7 STUFFTSERTSERTSERTSERNTSER193S YELLOW ALARM – B2 STUFFB7 STUFFTSER + ABCD

Strona 3 - 041995 3/36

DS2180A041995 11/36193S TRANSMIT MULTIFRAME TIMING Figure 9TLCLK123 4567891011121 23 45612BABAFRAME #TFSYNCTMSYNC1TMO1TSIGSELTABCD2TLINK3TSIGFRNOTES:

Strona 4 - 041995 4/36

DS2180A041995 12/36193E TRANSMIT MULTIFRAME TIMING Figure 10TLCLK1 2 3 4 5 6 7 8 9 1011 12131415 16171824DABCFRAME #TFSYNCTMSYNC1TMO1TSIGSELTABCD2TLI

Strona 5 - CHIP SELECT AND CLOCK CONTROL

DS2180A041995 13/36TRANSMIT MULTIFRAME BOUNDARY TIMING Figure 11LSB MSB LSB MSBF LSB MSBLSB MSB LSB MSB LSB MSBFTCLKTMSYNCTMOTFSYNCTSIGSELTSIGFRTLCLK

Strona 6 - BURST MODE

DS2180A041995 14/36RECEIVE CONTROL REGISTER Figure 12(MSB) (LSB)ARC OOF RCI RCS SYNCC SYNCT SYNCE RESYNCSYMBOL POSITION NAME AND DESCRIPTIONARC RCR.7

Strona 7 - BIT SEVEN STUFFING

DS2180A041995 15/36RECEIVE SIGNALINGRobbed bit signaling data is presented at RABCD dur-ing each channel time in signaling frames for all 24 in-coming

Strona 8 - TRANSMIT YELLOW ALARM

DS2180A041995 16/36193E RECEIVE MULTIFRAME TIMING Figure 151 2 3 4 5 6 7 8 91011121314 151617FRAME#RFSYNCRMSYNCRSIGSELRSIGFRRLCLKRABCD1RLINK218 19 20

Strona 9 - TRANSMIT IDLE CODE INSERTION

DS2180A041995 17/36RECEIVE MULTIFRAME BOUNDARY TIMING Figure 16LSB MSB LSB MSBF LSB MSBLSB MSBLSB MSBF LSB MSBCHANNEL 24 B OR DCHANNEL 23 B OR DRCLKR

Strona 10 - 041995 10/36

DS2180A041995 18/36RSR: RECEIVE STATUS REGISTER Figure 17(MSB) (LSB)BVCS ECS RYEL RCL FERR B8ZSD RBL RLOSSYMBOL POSITION NAME AND DESCRIPTIONBVCS RSR.

Strona 11 - 041995 11/36

DS2180A041995 19/36RIMR: RECEIVE INTERRUPT MASK REGISTER Figure 18(MSB) (LSB)BVCS ECS RYEL RCL FERR B8ZSD RBL RLOSSYMBOL POSITION NAME AND DESCRIPTION

Strona 12 - 041995 12/36

TransmitTimingF-BitDataDataSelectorBipolarCoderYellowAlarmCRCSerialControlInterfaceYellowAlarmDetectInformationRegistersReceiveSyncControllerCodeGenDa

Strona 13 - (193E framing only)

DS2180A041995 20/36BVCR: BIPOLAR VIOLATION COUNT REGISTER Figure 19(MSB) (LSB)BVD7 BVD6 BVD5 BVD4 BVD3 BVD2 BVD1 BVD0SYMBOL POSITION NAME AND DESCRIPT

Strona 14 - RECEIVE SYNCHRONIZER

DS2180A041995 21/36RYEL OUTPUTThe yellow alarm output transitions high when a yellowalarm is detected. A high-low transition indicates thealarm condit

Strona 15 - RECEIVE SIGNALING

DS2180A041995 22/36HARDWARE MODEFor preliminary system prototyping or applicationswhich do not require the features offered by the serialport, the tra

Strona 16 - 041995 16/36

DS2180A041995 23/36T1 OVERVIEWFraming StandardsThe DS2180A is compatible with the existing Bell Sys-tem D4 framing standard described in ATT PUB 43801

Strona 17 - 041995 17/36

DS2180A041995 24/36193E FRAMING FORMAT Table 7FRAMEF-BIT USE BIT USE IN EACH CHANNEL SIGNALING-BIT USEFRAMENUMBERFPS1FDL2CRC3DATA SIGNALING 2STATE4ST

Strona 18 - ALARM SERVICING

DS2180A041995 25/36193S FRAMING FORMAT Table 8FRAMENUMBERF-BIT USE BIT USE IN EACH CHANNELSIGNALING-BIT USENUMBERFT1FS2DATA SIGNALING4123456789101112

Strona 19 - SUPERFRAMES

DS2180A041995 26/36TRANSMIT SIDE OVERVIEWThe transmit side of the DS2180A is made up of six ma-jor functional blocks: timing and clock generation, dat

Strona 20 - RLOS OUTPUT

DS2180A041995 27/36nizer before sync is declared. Clearing RCR.3 causesthe synchronizer to search for FT patterns (101010...)without cross-coupling th

Strona 21 - 041995 21/36

DS2180A041995 28/36BACKPLANE INTERFACE USING DS2180A AND DS2176 Figure 22TRANSMITLINE INTERFACEDS2186RECEIVELINE INTERFACEDS2187TRANSMITBACKPLANEINTE

Strona 22 - HARDWARE MODE Table 6

DS2180A041995 29/36PROCESSOR-BASED TRANSMIT SIGNALING INSERTION Figure 23SPSINTSDOSDISCLKCSTSIGFRTCHCLKTABCDTMSYNCTFSYNCINT1P1.1P1.0TXDRXDINT08031/51

Strona 23 - Signaling

DS2180A041995 3/36TRANSMIT PIN DESCRIPTION (40–PIN DIP ONLY) Table 1PIN SYMBOL TYPE DESCRIPTION1 TMSYNC I Transmit Multiframe Sync. May be pulsed hig

Strona 24 - 193E FRAMING FORMAT Table 7

DS2180A041995 30/36ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground –1.0V to 7.0VOperating Temperature 0°C to +70°CStorage Temperature –

Strona 25 - Line Coding

DS2180A041995 31/36AC ELECTRICAL CHARACTERISTICS (0°C to 70°C; VDD = 5V + 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESSDI to SCLK Setup tDC50 nsSCLK t

Strona 26 - 041995 26/36

DS2180A041995 32/36SERIAL PORT READ AC TIMINGCSSCLKSDOtCDZHigh ZtCDVNOTE:1. Serial port write must precede a port read to provide address information.

Strona 27 - Table 9

DS2180A041995 33/36AC ELECTRICAL CHARACTERISTICS1 – RECEIVE (0°C to 70°C; VDD = 5V + 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESPropagation Delay RCL

Strona 28 - 041995 28/36

DS2180A041995 34/36TRANSMIT AC TIMING DIAGRAMTCHCLK, TPOS,TNEGTFSYNC, TMSYNCTSER, TABCD,TLINKTCLKtSTDtHTDtWHtPtWLtFtRtSTStPTStPTCHTMO, TLCLK,TSIGSEL,

Strona 29 - PROCESSOR-BASED SIGNALING

DS2180A041995 35/36DS2180A SERIAL T1 TRANSCEIVER (600 MIL DIP)BDACKG HJEF1INCHESDIM. MIN. MAX.A 2.050 2.075B 0.530 0.550C 0.140 0.160D 0.600 0.625E 0.

Strona 30 - 041995 30/36

DS2180A041995 36/36DS2180AQ SERIAL T1 TRANSCEIVER (PLCC)CA1A2 ABB1.075 MAXN1.150MAXNOTE 1D1DCH1EE1e1E2D2NOTE1: PIN 1 IDENTIFIER TO BE LOCATED IN ZONE

Strona 31 - = 5V + 10%)

DS2180A041995 4/36POWER AND TEST PIN DESCRIPTION (40–PIN DIP ONLY) Table 3PIN SYMBOL TYPE DESCRIPTION20 VSS– Signal Ground. 0.0 volts.32 TEST I Test

Strona 32 - 041995 32/36

DS2180A041995 5/36REGISTER SUMMARY Table 5REGISTER ADDRESS T/R1DESCRIPTION/FUNCTIONRSR 0000 R2Receive Status Register. Reports all receive alarm cond

Strona 33 - – RECEIVE (0°C to 70°C; V

DS2180A041995 6/36DATA I/OFollowing the eight SCLK cycles that input an address/command byte to write, a data byte is strobed into theaddressed regist

Strona 34 - RECEIVE AC TIMING DIAGRAM

DS2180A041995 7/36COMMON CONTROL REGISTER Figure 4(MSB) (LSB)– FRSR2 EYELMD FM SYELMD B8ZS B7 LPBKSYMBOL POSITION NAME AND DESCRIPTION– CCR.7 Reserved

Strona 35

DS2180A041995 8/36B8ZSThe DS2180A supports existing and emerging zerosuppression formats. Selection of B8ZS coding main-tains system 1’s density requi

Strona 36 - 041995 36/36

DS2180A041995 9/36TRANSMIT SIGNALINGWhen enabled (via TCR.4) channel signaling is insertedin frames 6 and 12 (193S) or in frames 6, 12, 18 and 24(193E

Komentarze do niniejszej Instrukcji

Brak uwag