Rainbow-electronics AT25F1024A Instrukcja Użytkownika Pobierz pdf

Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

– Datasheet Describes Mode 0 Operation

• 20 MHz Clock Rate

• Byte Mode and 256-byte Page Mode for Program Operations

• Sector Architecture:

– Four Sectors with 32K Bytes Each (1M)

– 128 Pages per Sector

• Product Identification Mode

• Low-voltage Operation

– 2.7 (V

= 2.7V to 3.6V)

• Sector Write Protection

• Write Protect (WP) Pin and Write Disable Instructions for

both Hardware and Software Data Protection

• Self-timed Program Cycle (20 µs/Byte Typical)

• Self-timed Sector Erase Cycle (1 second/Sector Typical)

• Single Cycle Reprogramming (Erase and Program) for Status Register

• High Reliability

– Endurance: 10,000 Write Cycles Typical

• Lead-free/Halogen-free Devices

• 8-lead JEDEC SOIC and 8-lead SAP Packages

Description

The AT25F1024A provides 1,048,576 bits of serial reprogrammable Flash memory

organized as 131,072 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation

are essential. The AT25F1024A is available in a space-saving 8-lead JEDEC SOIC

and 8-lead SAP packages.

The AT25F1024A is enabled through the Chip Select pin (CS

) and accessed via a 3-

wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial

Clock (SCK). All write cycles are completely self-timed.

BLOCK WRITE protection for top 1/4, top 1/2 or the entire memory array is enabled by

programming the status register. Separate write enable and write disable instructions

are provided for additional data protection. Hardware data protection is provided via

the WP

pin to protect against inadvertent write attempts to the status register. The

HOLD

pin may be used to suspend any serial communication without resetting the

serial sequence.

Rev. 3346C–SEEPR–7/04

SPI Serial

Memory

1M (131,072 x 8)

AT25F1024A

Advance

Information

Pin Configurations

Pin Name Function

Chip Select

SCK Serial Data Clock

SI Serial Data Input

SO Serial Data Output

GND Ground

VCC Power Supply

Write Protect

HOLD

Suspends Serial Input

8-lead SOIC

GND

VCC

HOLD

SCK

8-lead SAP

Bottom View

VCC

HOLD

SCK

GND

1 2 3 4 5 6 ... 17 18

Podsumowanie treści

Strona 1 - Information

1Features• Serial Peripheral Interface (SPI) Compatible• Supports SPI Modes 0 (0,0) and 3 (1,1)– Datasheet Describes Mode 0 Operation• 20 MHz Clock Ra

Strona 2 - Absolute Maximum Ratings*

103346C–SEEPR–7/04A single PROGRAM instruction programs 1 to 256 consecutive bytes within a page if itis not write protected. The starting byte could

Strona 3 - Pin Capacitance

113346C–SEEPR–7/04Timing Diagrams (for SPI Mode 0 (0, 0))Synchronous Data TimingWREN TimingWRDI TimingSOVOHVOLHI-ZHI-ZtVVALID INSIVIHVILtHtSUtDISSCKVI

Strona 4

123346C–SEEPR–7/04RDSR TimingWRSR TimingREAD TimingCSSCK01234567891011121314SIINSTRUCTIONSO76543210DATA OUTMSBHIGH IMPEDANCE15CSSISCKHIGH IMPEDANCEINS

Strona 5 - Description

133346C–SEEPR–7/04PROGRAM TimingHOLD TimingSECTOR ERASE TimingCSSCKSISO3-BYTE ADDRESS1st BYTE DATA-IN256th BYTE DATA-ININSTRUCTIONHIGH IMPEDANCE012345

Strona 6 - SPI Serial Interface

143346C–SEEPR–7/04CHIP ERASE TimingRDID TimingXX = Don’t Care bit12 13 14 15 16 172318 19XMANUFACTURERCODE (ATMEL)DEVICE CODE

Strona 7 - Functional

153346C–SEEPR–7/04Ordering InformationOrdering Code Package Operation RangeAT25F1024AN-10SU-2.7AT25F1024AY4-10YU-2.78S18Y4Lead-free/Halogen-free Indus

Strona 8

163346C–SEEPR–7/04Package Drawing8S1 – JEDEC SOIC1150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80906TITLEDRAWING NO.RREV. Note:10/7/038S1, 8-lead

Strona 9

173346C–SEEPR–7/048Y4 – SAP1150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80817TITLEDRAWING NO.RREV. 8Y4, 8-lead (6.00 x 4.90 mm Body) SOIC Array P

Strona 10 - 3346C–SEEPR–7/04

Printed on recycled paper.3346C–SEEPR–7/04Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly con

Strona 11 - WRDI Timing

23346C–SEEPR–7/04Block Diagram Absolute Maximum Ratings*Operating Temperature... -40°C to +85°C*NOTICE: Stresses bey

Strona 12 - RDSR Timing

33346C–SEEPR–7/04Note: 1. This parameter is characterized and is not 100% tested.Note: 1. VIL and VIH max are reference only and are not tested.Pin Ca

Strona 13 - X = Don’t Care bit

43346C–SEEPR–7/04Notes: 1. The programming time for n bytes will be equal to n x tBPC.2. This parameter is characterized at 3.3V, 25°C and is not 100%

Strona 14

53346C–SEEPR–7/04Serial Interface DescriptionMASTER: The device that generates the serial clock.SLAVE: Because the Serial Clock pin (SCK) is always an

Strona 15 - Ordering Information

63346C–SEEPR–7/04SPI Serial InterfaceMASTER:MICROCONTROLLERSLAVE:AT25F1024ADATA OUT (MOSI)DATA IN (MISO)SERIAL CLOCK (SPI CK)SS0SS1SS2SS3SISOSCKCSSISO

Strona 16 - Side View

73346C–SEEPR–7/04Functional DescriptionThe AT25F1024A is designed to interface directly with the synchronous serial peripheralinterface (SPI) of the 6

Strona 17

83346C–SEEPR–7/04READ PRODUCT ID (RDID): The RDID instruction allows the user to read the manufac-turer and product ID of the device. The first byte a

Strona 18 - Regional Headquarters

93346C–SEEPR–7/04The WRSR instruction also allows the user to enable or disable the Write Protect (WP)pin through the use of the Write Protect Enable

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