General DescriptionThe MAX1167/MAX1168 low-power, multichannel, 16-bit analog-to-digital converters (ADCs) feature a suc-cessive-approximation ADC, in
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Detailed DescriptionThe MAX1167/MAX1168 low-power, multichannel, 16-bitADCs feature a successive-approximation ADC, auto-matic power-down, integrated
MAX1167/MAX1168Track/Hold (T/H)In track mode, the analog signal is acquired on theinternal hold capacitor. In hold mode, the T/H switchesopen and the
The MAX1168 features a 16-bit-wide data-transfermode that includes a longer acquisition time (11.5clock cycles). Longer acquisition times are useful i
MAX1167/MAX1168Digital InterfaceThe MAX1167/MAX1168 feature an SPI/QSPI/MICROWIRE-compatible, 3-wire serial interface. TheMAX1167 digital interface co
MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
MAX1167/MAX1168Power-Down ModesTable 5 shows the MAX1167/MAX1168 power-downmodes. Three internal reference modes and one exter-nal reference mode are
than 125kHz can reduce accuracy due to leakage of thesampling capacitor. DOUT changes from high-Z to logiclow after CS is brought low. Input data latc
MAX1167/MAX1168The MAX1168 external clock 16-bit-wide data-transfermode requires 32 SCLK cycles for completion (Figure 11).Force CS high after the co
entire conversion result, 16 SCLK cycles are needed.Extra clock pulses, occurring after the conversion resulthas been clocked out and prior to the ris
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MAX1167/MAX1168Internal Clock 16-Bit-Wide Data-Transfer and ScanMode (MAX1168 Only)Force DSPR high and DSEL low for the SPI/QSPI/MICROWIRE interface m
are shut down on the EOC high-to-low transition. Usethe EOC high-to-low transition as the signal to restartthe external clock (SCLK). To read the ent
MAX1167/MAX1168setting bits 4 and 3 in the command/configuration/con-trol register (see Tables 3 and 4). In scan mode, conver-sion results are stored
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MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
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MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
Effective Number of BitsEffective number of bits (ENOB) indicates the globalaccuracy of an ADC at a specific input frequency andsampling rate. An idea
MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConvertersMaxim cannot assume responsibility for use of any circuitry other than circuit
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MAX1167/MAX1168Multichannel, 16-Bit, 200ksps Analog-to-DigitalConverters______________________________________________________________________________
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OFFSET ERROR vs. SUPPLY VOLTAGEMAX1167/68 toc17AVDD (V)OFFSET ERROR (µV)5.154.85 5.054.952001000-100-200-300-4004.75 5.25VREF = +4.096VGAIN ERROR vs.
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