Rainbow-electronics DS3184 Instrukcja Użytkownika Pobierz pdf

PRODUCT BRIEF

Maxim/Dallas Semiconductor Confidential

Note: This Product Preview contains preliminary information and is subject to change without notice.

Some revisions of this device may incorporate deviations from published specifications known as errata.

Multiple revisions of any device may be simultaneously available through various sales channels. For

information about device errata, visit: http://dbserv.maxim-ic.com/errata.cfm

PRELIMINAR

PRODUCT BRIEF

PRODUCT PREVIEW

DS3181,2,3,4 Multi-Port ATM/Packet PHYs

For DS3/E3 with Built-In LIUs

FEATURES

• Quad (DS3184), triple (DS3183), dual

(DS3182) or single (DS3181) with integrated

LIU ATM / Packet PHYs for DS3 and E3

• Each port independently configurable

• Performs receive clock/data recovery and

transmit wave shaping

• Jitter attenuators can be placed either in the

receive or transmit paths

• Interfaces to 75Ω coaxial cable at lengths up

to 380 meters or 1246 feet (DS3) or 440

meters or 1443 feet (E3)

• Uses 1:2 transformers on both Tx and Rx

• Requires minimal external components

• Universal PHYs map ATM cells and/or

HDLC packets into DS3 or E3 data streams

• UTOPIA 2 or 3 or POS-PHY 2 or 3 interface

with 8, 16, or 32 bit bus width up to 66 MHz

• Ports independently configurable for cell or

packet traffic in POS-PHY bus modes

• Direct, PLCP and clear-channel cell mapping

• Direct and clear-channel packet mapping

• On-chip DS3 (M23 or C-bit) and E3 (G.751

or G.832) framers

• Ports independently configurable for DS3, E3

or arbitrary framing protocol up to 52 Mbps

• Programmable (externally controlled or

internally hardware based engine) subrate

DS3/E3 circuitry

• Full featured DS3/E3/PLCP alarms

• Built-in HDLC controllers with 256 byte

FIFOs for DS3 PMDL, G.751 Sn bit or G.832

NR/GC bytes

• On-chip BERTs for PRBS and repetitive

pattern generation, detection and analysis

• Large performance-monitoring counters for

accumulation intervals up to 1 second

• Flexible overhead insertion/extraction ports

for DS3, E3 and PLCP framers

• Loopback include line, diagnostic, framer

payload and system interface

• Ports can be disabled to reduce power

• Integrates clock rate adapter to generate the

required 44.736 MHz for DS3, 34.368 MHz

for E3, and/or 52 MHz for arbitrary framing

protocol up to 52 Mbps

• 8/16-bit generic microprocessor interface

• Low power 3.3V operation (5V tolerant I/O)

• Small high-density Thermally Enhanced (TE)

Chip Scale BGA packaging

• Industrial temperature range: -40 to +85°C

• IEEE 1149.1 JTAG test port

www.maxim-ic.com/telecom

Rev 1.5 1 of 13 022304

1 2 3 4 5 6 ... 12 13

Podsumowanie treści

Strona 1 - PRODUCT PREVIEW

PRODUCT BRIEFMaxim/Dallas Semiconductor Confidential Note: This Product Preview contains preliminary information and is subject to change without noti

Strona 2

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 10 of 13 022304 • Terminates the Path Maintenance Data Link in DS

Strona 3 - 1 BLOCK DIAGRAMS

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 11 of 13 022304 3.23 Subrate Features • Independent per port bui

Strona 4 - 2 APPLICATIONS

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 12 of 13 022304 Specification Specification Title D34S), Termina

Strona 5 - 3 FEATURE DETAILS

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 13 of 13 022304 5 PACKAGE MECHANICAL DIMENSIONS The target package

Strona 6 - 3.1 Global Features

Maxim/Dallas Semiconductor Confidential Note: This Product Preview contains preliminary information and is subject to change without notice. Some rev

Strona 7 - 7 of 13 022304

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 3 of 13 022304 DESCRIPTION The DS3184 (quad), DS3183 (triple), DS3

Strona 8 - 8 of 13 022304

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 4 of 13 022304 Figure 1-2 Functional Block Diagram TDENn TDATn

Strona 9 - 9 of 13 022304

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 5 of 13 022304 Figure 2-1 Four-Port Unchannelized ATM over T3/E3 L

Strona 10 - 10 of 13 022304

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 6 of 13 022304 3.1 Global Features • System interface configurabl

Strona 11 - 4 STANDARDS COMPLIANCE

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 7 of 13 022304 • C bits configurable as payload or overhead • Mo

Strona 12 - 12 of 13 022304

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 8 of 13 022304 3.7 Receive FIFO Features • Storage capacity for f

Strona 13 - 6 POWER ESTIMATE

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4 Rev 1.5 9 of 13 022304 • Automatic packet abort insertion • Packet scram

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