Rainbow-electronics DS26503 Instrukcja Użytkownika Strona 92
- Strona / 123
- Spis treści
- BOOKMARKI
- DS26503 1
- T1/E1/J1 BITS Element 1
- TABLE OF CONTENTS 2
- 3 of 123 3
- 4 of 123 4
- LIST OF FIGURES 5
- LIST OF TABLES 6
- 1. FEATURES 7
- 1.1 General 7
- 1.2 Line Interface 7
- 1.3 Jitter Attenuator 7
- 1.4 Framer/Formatter 8
- 1.5 Test and Diagnostics 8
- 1.6 Control Port 8
- 2. SPECIFICATIONS COMPLIANCE 9
- 10 of 123 10
- 11 of 123 11
- 3. BLOCK DIAGRAMS 12
- Figure 3-1. Block Diagram 12
- 13 of 123 13
- (HARDWARE MODE PIN NAME) 14
- 4.1 Transmit PLL 15
- 4.2 Transmit Side 15
- 4.3 Receive Side 16
- 4.4 Controller Interface 17
- 18 of 123 18
- 19 of 123 19
- 20 of 123 20
- 4.5 JTAG 21
- 4.6 Line Interface 21
- 4.7 Power 22
- 5. PINOUT 23
- Table 5-1. LQFP Pinout 23
- INT INT JACKS 24
- CS CS RLB 25
- RD (DS) — RMODE2 25
- WR (R/W) — TMODE3 25
- 6.1 Transmit Clock Source 26
- 6.2 Internal Termination 26
- 6.3 Line Build-Out 27
- Table 6-3. E1 Line Build-Out 27
- Table 6-4. T1 Line Build-Out 27
- 6.4 Receiver Operating Modes 27
- 6.6 MCLK Pre-Scaler 28
- 29 of 123 29
- 7. PROCESSOR INTERFACE 30
- Table 7-1. Port Mode Select 30
- 7.2.5 Register Writes 31
- 7.2.6 Register Reads 31
- 7.3 Register Map 32
- 33 of 123 33
- 7.3.1 Power-Up Sequence 34
- 7.3.2 Test Reset Register 34
- 7.4 Interrupt Handling 38
- 7.5 Status Registers 38
- 7.6 Information Registers 39
- 8.1 T1 Control Registers 40
- Table 8-1. T1 Alarm Criteria 45
- 9.1 E1 Control Registers 46
- Table 9-2. E1 Alarm Criteria 49
- Table 10-1. TS Pin Functions 53
- TSINV — — — — 54
- Table 11-1. T1 SSM Messages 55
- 11.2 Transmit BOC 55
- 11.3 Receive BOC 56
- Table 12-1. E1 SSM Messages 64
- 13.1 LIU Operation 78
- 13.2 LIU Receiver 78
- 13.3 LIU Transmitter 79
- 13.4 MCLK Pre-Scaler 80
- 13.5 Jitter Attenuator 80
- Figure 13-3. CMI Coding 81
- 13.7 LIU Control Registers 82
- 13.8 Recommended Circuits 90
- Figure 13-4. Basic Interface 90
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- 93 of 123 93
- 14. LOOPBACK CONFIGURATION 96
- 97 of 123 97
- 10kW 10kW 10kW 98
- 99 of 123 99
- 100 of 123 100
- 101 of 123 101
- 16.1 Instruction Register 102
- 103 of 123 103
- 104 of 123 104
- 105 of 123 105
- 17.1 Processor Interface 106
- 17.1.1 Parallel Port Mode 106
- 17.1.2 SPI Serial Port Mode 106
- ABSOLUTE MAXIMUM RATINGS 109
- 110 of 123 110
- 19.1 Multiplexed Bus 111
- 112 of 123 112
- 113 of 123 113
- 19.2 Nonmultiplexed Bus 114
- 75ns max 115
- 0ns min 115
- 5ns min/20ns max 115
- 19.3 Serial Bus 117
- 119 of 123 119
- 120 of 123 120
- 121 of 123 121
- 20. REVISION HISTORY 122
- 21. PACKAGE INFORMATION 123
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