
DS1854
Register Map
A description of the registers is below. The registers
are read only (R) or read/write (R/W). The R/W registers
are writable only if write protect has not been asserted
(see the Memory Description section).
Dual Temperature-Controlled Resistors with
Two Monitors
12 ____________________________________________________________________
EEPROM/SRAM R/W DEFAULT SETTING
NAME OF LOCATION FUNCTION
00 to 7F EEPROM
R/W
R/W
SETTING
NAME OF LOCATION
R/W
TMPlimhi (MSB to LSB)
Contains upper limit settings for temperature.
If the limit is violated, a flag in Main Device
byte 70h is set.
02 to 03 EEPROM
R/W
TMPlimlo (MSB to LSB)
Contains lower limit settings for temperature.
If the limit is violated, a flag in Main Device
byte 70h is set.
04 to 07 EEPROM R 00 Reserved —
08 to 09 EEPROM
R/W
V
CC
limhi (MSB to LSB)
Contains upper limit settings for V
CC
. If the
limit is violated, a flag in Main Device byte
70h is set.
0A to 0B EEPROM
R/W
V
CC
limlo (MSB to LSB)
Contains lower limit settings for V
CC
. If the
limit is violated, a flag in Main Device byte
70h is set.
0C to 0F EEPROM 00 Reserved —
10 to 11 EEPROM
R/W
MON1limhi (MSB to LSB)
Contains upper limit settings for MON1. If the
limit is violated, a flag in Main Device byte
70h is set.
12 to 13 EEPROM
R/W
MON1limlo (MSB to LSB)
Contains lower limit settings for MON1. If the
limit is violated, a flag in Main Device byte
70h is set.
14 to 17 EEPROM 00 Reserved —
18 to 19 EEPROM
R/W
MON2limhi (MSB to LSB)
Contains upper limit settings for MON2. If the
limit is violated, a flag in Main Device byte
70h is set.
1A to 1B EEPROM
R/W
MON2limlo (MSB to LSB)
Contains lower limit settings for MON2. If the
limit is violated, a flag in Main Device byte
Main Device
Note: SRAM defaults are power-on defaults. EEPROM defaults are factory defaults.
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