Rainbow-electronics ATR0622 Instrukcja Użytkownika

Przeglądaj online lub pobierz Instrukcja Użytkownika dla Odbiornik GPS Rainbow-electronics ATR0622. Rainbow Electronics ATR0622 User Manual Instrukcja obsługi

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Features
16-channel GPS Correlator
8192 Search Bins with GPS Acquisition Accelerator
Accuracy: 2.5m CEP (Stand-Alone, S/A off)
Time to First Fix: 34s (Cold Start)
Acquisition Sensitivity: –140 dBm
Tracking Sensitivity: –150 dBm
Utilizes the ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Embedded ICE (In-circuit Emulator)
128 Kbyte Internal RAM
384 Kbyte Internal ROM with u-blox GPS Firmware
6-channel Peripheral Data Controller (PDC)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
2 External Interrupts
24 User-programmable I/O Lines
1 USB Device Port
Universal Serial Bus (USB) V2.0 Full-speed Device
Embedded USB V2.0 Full-speed Transceiver
Suspend/Resume Logic
Ping-pong Mode for Isochronous and Bulk Endpoints
2 USARTs
2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Master/Slave SPI Interface
2 Dedicated Peripheral Data Controller (PDC) Channels
8-bit to 16-bit Programmable Data Length
4 External Slave Chip Selects
Programmable Watchdog Timer
Advanced Power Management Controller (APMC)
Peripherals Can Be Deactivated Individually
Geared Master Clock to Reduce Power Consumption
Sleep State with Disabled Master Clock
Hibernate State with 32.768 kHz Master Clock
Real Time Clock (RTC)
2.3V to 3.6V or 1.8V Core Supply Voltage
Includes Power Supervisor
1.8V to 3.3V User-definable I/O Voltage for Several GPIOs with 5V Tolerance
4 Kbytes Battery Backup Memory
8 mm × 8 mm 56 Pin QFN56 Package
Pb-free, RoHS-compliant, Green
GPS Baseband
Processor
ATR0622
Summary
Preliminary
Rev. 4891CS–GPS–01/06
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Podsumowanie treści

Strona 1 - Preliminary

Features•16-channel GPS Correlator– 8192 Search Bins with GPS Acquisition Accelerator– Accuracy: 2.5m CEP (Stand-Alone, S/A off)– Time to First Fix: 3

Strona 2

104891CS–GPS–01/06ATR0622 [Preliminary] 3.3.2 Sensitivity Settings3.3.3 Serial I/O ConfigurationThe ATR0622 features a two-stage I/O message and pro

Strona 3

114891CS–GPS–01/06 ATR0622 [Preliminary] The following message settings are used in the tables below:The following settings apply if GPSMODE configur

Strona 4

124891CS–GPS–01/06ATR0622 [Preliminary] 3.3.4 USB Power ModeFor correct response to the USB host queries, the device has to know its power mode. Thi

Strona 5

134891CS–GPS–01/06 ATR0622 [Preliminary] The Antenna Supervisor Software will be configured as follows:1. Enable Control Signal2. Enable Short Circui

Strona 6

144891CS–GPS–01/06ATR0622 [Preliminary] 3.4 External Connections for a Working GPS SystemFigure 3-2. Example of an External Connection ATR0601ATR062

Strona 7

154891CS–GPS–01/06 ATR0622 [Preliminary] Table 3-15. Recommended Pin Connection Pin Name Recommended External CircuitP0/NANTSHORTInternal pull-down r

Strona 8

164891CS–GPS–01/06ATR0622 [Preliminary] 3.4.1 Connecting an Optional Serial EEPROMThe ATR0622 offers the possibility to connect an external serial E

Strona 9

174891CS–GPS–01/06 ATR0622 [Preliminary] 4. Power SupplyThe baseband IC is supplied with four distinct supply voltages:• VDD18, the nominal 1.8V supp

Strona 10 - ATR0622 [Preliminary]

184891CS–GPS–01/06ATR0622 [Preliminary] The baseband IC contains a built in low dropout voltage regulator LDO18. This regulator can be used if the h

Strona 11 - ATR0622 [Preliminary]

194891CS–GPS–01/06 ATR0622 [Preliminary] The USB Transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected

Strona 12

24891CS–GPS–01/06ATR0622 [Preliminary] 1. DescriptionThe GPS baseband processor ATR0622 includes a 16-channel GPS correlator and is based on the ARM

Strona 13

204891CS–GPS–01/06ATR0622 [Preliminary] 5. OscillatorFigure 5-1. Crystal Connection XT_INXT_OUTRTCATR0622 internal32 kHzCrystalOscillator32.768 kHz

Strona 14

214891CS–GPS–01/06 ATR0622 [Preliminary] 7. Electrical Characteristics If no additional information is given in column Test Conditions, the values ap

Strona 15

224891CS–GPS–01/06ATR0622 [Preliminary] 1.23Input-leakage Current (standard Inputs and I/Os)VDD18 = 1.95V VIL = 0VILEAK–1 +1 µA1.24 Input Capacitanc

Strona 16

234891CS–GPS–01/06 ATR0622 [Preliminary] 9. ESD SensitivityThe ATR0622 is an ESD sensitive device. The current ESD values are to be defined.Observe p

Strona 17

244891CS–GPS–01/06ATR0622 [Preliminary] 11. LDOBAT and Backup DomainThe LDOBAT is a built in low dropout voltage regulator which provides the supply

Strona 18

254891CS–GPS–01/06 ATR0622 [Preliminary] 13. Package QFN56 12. Ordering InformationExtended Type Number Package MPQ RemarksATR0622-PYQW QFN56 20008 m

Strona 19

Printed on recycled paper.4891CS–GPS–01/06© Atmel Corporation 2006. All rights reserved. Atmel®, logo and combinations thereof, Everywhere You Are® a

Strona 20

34891CS–GPS–01/06 ATR0622 [Preliminary] Figure 1-1. ATR0622 Block Diagram NSLEEPNSHDNXT_INNRESETTMSTCKTDOTDINTRSTDBG_ENCLK23RF_ONP0/NANTSHORTP15/ANTO

Strona 21

44891CS–GPS–01/06ATR0622 [Preliminary] 2. Architectural Overview2.1 DescriptionThe ATR0622 architecture consists of two main buses, the Advanced Sys

Strona 22

54891CS–GPS–01/06 ATR0622 [Preliminary] 3. Pin Configuration3.1 PinoutFigure 3-1. Pinout QFN56 (Top View) 42 2911443 2856 15ATR0622Table 3-1. ATR0622

Strona 23

64891CS–GPS–01/06ATR0622 [Preliminary] P14 1 I/O Configurable (PD) NAADET1 “0”P15 17 I/O PD ANTONP16 6 I/O Configurable (PU) NEEPROM SIGHI1 NWD_OVFP

Strona 24

74891CS–GPS–01/06 ATR0622 [Preliminary] 3.2 Signal DescriptionTable 3-2. ATR0622 Signal Description Module Name Function Type Active Level CommentEBI

Strona 25

84891CS–GPS–01/06ATR0622 [Preliminary] JTAG/ICETMS Test Mode Select Input – Internal pull-up resistorTDI Test Data In Input – Internal pull-up resis

Strona 26 - Regional Headquarters

94891CS–GPS–01/06 ATR0622 [Preliminary] 3.3 Setting GPSMODE0 to GPSMODE12The start-up configuration of a ROM-based system without external non-volati

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