Rainbow-electronics ATmega1284P Instrukcja Użytkownika Pobierz pdf

Features

• High-performance, Low-power AVR

8-bit Microcontroller

• Advanced RISC Architecture

– 131 Powerful Instructions – Most Single-clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20 MHz

– On-chip 2-cycle Multiplier

• Nonvolatile Program and Data Memories

– 128K Bytes of In-System Self-Programmable Flash

Endurance: 10,000 Write/Erase Cycles

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– 4K Bytes EEPROM

Endurance: 100,000 Write/Erase Cycles

– 16K Bytes Internal SRAM

– Programming Lock for Software Security

• JTAG (IEEE std. 1149.1 Compliant) Interface

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

• Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes

– Two 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture

Mode

– Real Time Counter with Separate Oscillator

– Six PWM Channels

– 8-channel, 10-bit ADC

Differential mode with selectable gain at 1x, 10x or 200x

– Byte-oriented Two-wire Serial Interface

– Two Programmable Serial USART

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

• Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby

and Extended Standby

• I/O and Packages

– 32 Programmable I/O Lines

– 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF

• Operating Voltages

– 1.8 - 5.5V for ATmega1284P

• Speed Grades

– 0 - 4 MHz @ 1.8 - 5.5V

– 0 - 10 MHz @ 2.7 - 5.5V

– 0 - 20 MHz @ 4.5 - 5.5V

• Power Consumption at 1 MHz, 1.8V, 25°C

– Active: 0.4 mA

– Power-down Mode: 0. 1 µA

– Power-save Mode: 0.7 µA (Including 32 kHz RTC)

8-bit

Microcontroller

with 128K Bytes

In-System

Programmable

Flash

ATmega1284P

Preliminary

Summary

8059CS–AVR–07/09

1 2 3 4 5 6 ... 19 20

ATmega1284P 1
Preliminary 1

Podsumowanie treści

Strona 1 - Preliminary

Features• High-performance, Low-power AVR® 8-bit Microcontroller• Advanced RISC Architecture– 131 Powerful Instructions – Most Single-clock Cycle Exec

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108059CS–AVR–07/09ATmega1284PNotes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory

Strona 3

118059CS–AVR–07/09ATmega1284P5. Instruction Set SummaryMnemonics Operands Description Operation Flags #ClocksARITHMETIC AND LOGIC INSTRUCTIONSADD Rd,

Strona 4

128059CS–AVR–07/09ATmega1284PBRVC k Branch if Overflow Flag is Cleared if (V = 0) then PC ← PC + k + 1 None 1/2BRIE k Branch if Interrupt Enabled if

Strona 5

138059CS–AVR–07/09ATmega1284PSPM Store Program Memory (Z) ← R1:R0 None -IN Rd, P In Port Rd ← PNone1OUT P, Rr Out Port P ← Rr None 1PUSH Rr Push Regis

Strona 6

148059CS–AVR–07/09ATmega1284P6. Ordering Information6.1 ATmega1284PNotes: 1. This device can also be supplied in wafer form. Please contact your local

Strona 7

158059CS–AVR–07/09ATmega1284P7. Packaging Information7.1 44A 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. 44A, 44-lead, 10 x 10 mm

Strona 8

168059CS–AVR–07/09ATmega1284P7.2 40P6 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. 40P6, 40-lead (0.600"/15.24 mm Wide) Plast

Strona 9

178059CS–AVR–07/09ATmega1284P7.3 44M1TITLEDRAWING NO.GPCREV. Package Drawing Contact: [email protected] H44M1, 44-pad, 7 x 7 x 1.0 m

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188059CS–AVR–07/09ATmega1284P8. Errata8.1 ATmega1284P Rev. ANo known Errata.

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198059CS–AVR–07/09ATmega1284P9. Datasheet Revision HistoryPlease note that the referring page numbers in this section are referred to this document. T

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28059CS–AVR–07/09ATmega1284P1. Pin ConfigurationsFigure 1-1. Pinout ATmega1284PNote: The large center pad underneath the QFN/MLF package should be sol

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8059CS–AVR–07/09Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel Asia

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38059CS–AVR–07/09ATmega1284P2. OverviewThe ATmega1284P is a low-power CMOS 8-bit microcontroller based on the AVR enhancedRISC architecture. By execut

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48059CS–AVR–07/09ATmega1284PThe ATmega1284P provides the following features: 128K bytes of In-System ProgrammableFlash with Read-While-Write capabilit

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58059CS–AVR–07/09ATmega1284P2.2.4 Port B (PB7:PB0)Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).

Strona 17

68059CS–AVR–07/09ATmega1284P3. ResourcesA comprehensive set of development tools, application notes and datasheetsare available fordownload on http://

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78059CS–AVR–07/09ATmega1284P4. Register SummaryAddress Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page(0xFF) Reserved - - - - - - -(0xFE) Re

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88059CS–AVR–07/09ATmega1284P(0xC0) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0 190/205(0xBF) Reserved - - - - - - - -(0xBE) Reserved - - - - - - -

Strona 20

98059CS–AVR–07/09ATmega1284P(0x7E) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 260(0x7D) Reserved - - - - - - - -(0x7C) ADMUX REFS1 REFS0 AD

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