Rainbow-electronics ATmega8HVD Instrukcja Użytkownika Pobierz pdf (Strona 14)

8052B–AVR–09/08

ATmega4HVD/8HVD

7. AVR Memories

7.1 Overview

This section describes the different memories in the ATmega4HVD/8HVD. The AVR architec-

ture has two main memory spaces, the Data Memory and the Program Memory space. In

addition, the ATmega4HVD/8HVD features an EEPROM Memory for data storage. All three

memory spaces are linear and regular.

7.2 In-System Reprogrammable Flash Program Memory

The ATmega4HVD/8HVD contains 4/8K bytes On-chip In-System Reprogrammable Flash

memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is

organized as 2K/4K x 16.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The

ATmega4HVD/8HVD Program Counter (PC) is 11/12 bits wide, thus addressing the 2K/4K

program memory locations. ”Memory Programming” on page 129 contains a detailed descrip-

tion on Flash data serial downloading.

Constant tables can be allocated within the entire program memory address space (see the

LPM – Load Program Memory instruction description).

Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution

Timing” on page 11.

Figure 7-1. Program Memory Map

Program Memory, organized as 2K/4K x 16 bits

0x0000

0x7FF/0xFFF

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 167 168

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