Rainbow-electronics LM93 Instrukcja Użytkownika

LM93Hardware Monitor with Integrated Fan Control for ServerManagement1.0 General DescriptionThe LM93, hardware monitor, has a two wire digital interfa

9.0 Pin Descriptions (Continued)Symbol Pin # Type FunctionAD_IN16 39 POWER (VDD) +3.3Vstandby powerVDDpower input for LM93. Generally this is connecte

10.0 Server Terminology (Continued)MTTR Mean time to repairNIC Network Interface Card (Ethernet Card)OS Operating systemP/S Power SupplyPCI PCI Local

12.0 Functional DescriptionThe LM93 provides 16 channels of voltage monitoring, tworemote thermal diode monitors, an onboard ambient tem-perature sens

12.0 Functional Description(Continued)provide a nominal3⁄4full scale reading, while the −12Vshould be scaled to provide a nominal1⁄4scale reading. The

12.0 Functional Description(Continued)Required External Level ShiftingResistors for −12V Power Input20068210The +3.3V standby voltage is used as a ref

12.0 Functional Description(Continued)Value Register VIN% ∆ from −12V77 -11.6758 2.701478 -11.6511 2.907279 -11.6264 3.113080 -11.6018 3.318881 -11.57

12.0 Functional Description(Continued)mented to a max count for an above temperature trip anddecremented to zero when below the trip temperature set-t

12.0 Functional Description(Continued)is configured to short the PROCHOT signals together, italways asserts them together whenever this function is en

13.0 Inputs/Outputs (Continued)of these issues caused problems that were difficult to workaround so moving to monitoring the fuse was selected as thes

14.0 SMBus Interface (Continued)telling the slave device to expect a block write, or it maysimply be a register address that tells the slave where sub

6.0 Block Diagram20068201LM93www.national.com 2

14.0 SMBus Interface (Continued)14.5.2 Block Command Code SummaryBlock command codes control the block read and write operations of the LM93 as summar

14.0 SMBus Interface (Continued)14.5.3.3 SMBus Write Block to Any AddressThe start address for a block write is embedded in this transaction. In this

14.0 SMBus Interface (Continued)14.5.4 Read OperationsThe LM93 uses the following SMBus read protocols.14.5.4.1 Read ByteIn the LM93, the read byte pr

14.0 SMBus Interface (Continued)12. The master receives byte 1 and then asserts ACK.13. The master receives byte 2 and then asserts ACK.14. The master

14.0 SMBus Interface (Continued)14.5.4.4 Simulated SMBus Block-Write Block-Read Process CallAlternatively, if the master cannot support an SMBus Block

14.0 SMBus Interface (Continued)5. The master sends a repeated START.6. The master sends the 7-bit slave address followed by a read bit (high).7. The

14.0 SMBus Interface (Continued)Whenever the low byte of a 16-bit register is written, the writeis buffered and does not take effect until the corresp

15.0 Using The LM93 (Continued)Channel#Input Typical Assignment1 Temp Zone 1 Remote Diode 1 TempReading2 Temp Zone 2 Remote Diode 2 TempReading3 Temp

15.0 Using The LM93 (Continued)Thermal Diode Temperature vs. LM93 TemperatureReading2006821515.9.1 Accuracy Effects of Diode Non-Ideality FactorThe te

15.0 Using The LM93 (Continued)size and cost of the inductor and other components used inthe output stage. The PWM outputs of the LM93 can operateup t

7.0 ApplicationBaseboard management of a Dual processor server. TwoLM93s may be required to manage a quad processor base-board. The block diagram of L

15.0 Using The LM93 (Continued)Zone 1/2 (CPU1 and CPU2) TableIn this example: Zones 1 and 2 are bound to the PWM1 output and the PWM1 frequency set to

15.0 Using The LM93 (Continued)Note that since zones 1 and 2 share the same lookup table,both zones must be operating in the same resolution mode.The

15.0 Using The LM93 (Continued)15.10.8 VRDx_HOT Ramp-Up/Ramp-DownThis function causes the duty cycle of the PWM outputs togradually increase over time

15.0 Using The LM93 (Continued)15.11 XOR TREE TESTAn XOR tree is provided in the LM93 for Automated TestEquipment (ATE) board level connectivity testi

16.0 Registers16.1 REGISTER WARNINGSIn most cases, reserved registers and register bits return zero when read. This should not be relied upon, since r

16.0 Registers (Continued)Lock Register Name Address Default DescriptionVALUE REGISTERSZone 2 (CPU2) Filtered Temp 55h 00h Filtered value of remote th

16.0 Registers (Continued)Lock Register Name Address Default DescriptionLIMIT REGISTERSZone 2 (CPU2) High Temp 7Bh 80h High limit for external thermal

16.0 Registers (Continued)Lock Register Name Address Default DescriptionLIMIT REGISTERSP2_PROCHOT User LimitB1h FFh User settable limit for P2_PROCHOT

16.0 Registers (Continued)Lock Register Name Address Default DescriptionSETUP REGISTERSx Zone 1 Base Temperature D0h N/D Base temperature to which loo

16.0 Registers (Continued)Lock Register Name Address Default DescriptionBLOCK COMMANDSBlock Write Command F0h N/A SMBus Block Write Command CodeBlock

Table of Contents1.0 General Description ...

16.0 Registers (Continued)16.3 FACTORY REGISTERS 00h–3Fh16.3.1 Register 00h XOR TestRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3

16.0 Registers (Continued)16.4 BMC ERROR STATUS REGISTERS 40h–47hThe B_Error Status Registers contain several bits that each represent a particular er

16.0 Registers (Continued)16.4.2 Register 41h B_Error Status 2RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.4.4 Register 43h B_Error Status 4RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.4.6 Register 45h B_P2_PROCHOT Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

16.0 Registers (Continued)16.4.8 Register 47h B_Fan Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0De

16.0 Registers (Continued)16.5.2 Register 49h H_Error Status 2RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.5.3 Register 4Ah H_Error Status 3RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.5.4 Register 4Bh H_Error Status 4RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.5.5 Register 4Ch H_P1_PROCHOT Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

Table of Contents (Continued)15.6 ERROR STATUS REGISTERS ...

16.0 Registers (Continued)16.5.6 Register 4Dh B_P2_PROCHOT Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

16.0 Registers (Continued)16.5.7 Register 4Eh H_GPI Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0De

16.0 Registers (Continued)16.5.8 Register 4Fh H_Fan Error StatusRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0De

16.0 Registers (Continued)16.6.3 Register 56–65h A/D Channel Voltage RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

16.0 Registers (Continued)16.6.5 Register 68h Average P1_PROCHOTRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0De

16.0 Registers (Continued)16.6.8 Register 6Bh GPI StateRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0DefaultValu

16.0 Registers (Continued)16.6.11 Register 6E–75h Fan Tachometer ReadingsRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit

16.0 Registers (Continued)16.7 LIMIT REGISTERS16.7.1 Registers 78–7Fh Temperature Limit RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit

16.0 Registers (Continued)16.7.3 Registers 90–AFh Voltage Limit RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit

16.0 Registers (Continued)16.7.4 Register B0–B1h PROCHOT User Limit RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

Table of Contents (Continued)16.7.3 Registers 90–AFh Voltage Limit Registers ...

16.0 Registers (Continued)16.7.5 Register B2–B3h Dynamic Vccp Limit Offset RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3

16.0 Registers (Continued)16.7.6 Register B4–BBh Fan Tach Limit RegistersRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit

16.0 Registers (Continued)16.8 SETUP REGISTERS16.8.1 Register BCh Special Function Control 1 (Voltage Hysteresis and Fan Control Filter Enable)Registe

16.0 Registers (Continued)16.8.2 Register BDh Special Function Control 2 (Smart Tach Mode Enable and Fan Control Temperature ResolutionControl)Registe

16.0 Registers (Continued)16.8.4 Register BFh PWM Ramp ControlRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defa

16.0 Registers (Continued)16.8.6 Register C1h Fan Boost Hysteresis (Zones 3/4)RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

16.0 Registers (Continued)16.8.8 Register C3h Zones 1/2 MinPWM and HysteresisRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

16.0 Registers (Continued)16.8.10 Register C5h GPORegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0DefaultValueC5h

16.0 Registers (Continued)16.8.11 Register C6h PROCHOT OverrideRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Def

16.0 Registers (Continued)16.8.12 Register C7h PROCHOT Time IntervalRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit

8.0 Connection Diagram56 Pin TSSOP20068202NS Package MTD56Top ViewNS Order Numbers:LM93CIMT (34 units per rail), orLM93CIMTX (1000 units per tape-and-

16.0 Registers (Continued)16.8.13 Register C8h PWM1 Control 1RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.14 Register C9h PWM1 Control 2RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.15 Register CAh PWM1 Control 3RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.17 Register CCh PWM2 Control 1RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.18 Register CDh PWM2 Control 2RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.19 Register CEh PWM2 Control 3RegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Defau

16.0 Registers (Continued)16.8.21 Register D0h–D3h Zone 1 to 4 Base TemperaturesRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit

16.0 Registers (Continued)16.8.23 Register E0h Special Function TACH to PWM BindingRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3

16.0 Registers (Continued)16.8.24 Register E2h LM93 Status ControlRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

16.0 Registers (Continued)16.8.25 Register E3h LM93 ConfigurationRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0D

9.0 Pin DescriptionsSymbol Pin # Type FunctionGPIO_0/TACH1 1 Digital I/O(Open-Drain)Can be configured as fan tach input or a general purposeopen-drain

16.0 Registers (Continued)16.9 SLEEP STATE CONTROL AND MASK REGISTERS16.9.1 Register E4h Sleep State ControlRegisterAddressRead/WriteRegisterNameBit 7

16.0 Registers (Continued)16.9.2 Register E5h S1 GPI MaskRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0DefaultVa

16.0 Registers (Continued)16.9.4 Register E7h S3 GPI MaskRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0DefaultVa

16.0 Registers (Continued)16.9.7 Register EAh S4/5 GPI MaskRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0Default

16.0 Registers (Continued)16.10 OTHER MASK REGISTERS16.10.1 Register ECh GPI Error MaskRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 Bi

16.0 Registers (Continued)16.10.3 Register EEh Special Function Zone 1 Adjustment OffsetRegisterAddressRead/WriteRegisterNameBit 7 Bit 6 Bit 5 Bit 4 B

17.0 Absolute MaximumRatings(Notes 1, 2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Di

DC Electrical Characteristics (Continued)The following limits apply for +3.0 VDCto +3.6 VDC, unless otherwise noted. Bold face limits apply for TA=TJo

AC Electrical CharacteristicsThe following limits apply for +3.0 VDCto +3.6 VDC, unless otherwise noted. Bold face limits apply for TA=TJ=TMINtoTMAXof

20068203Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which

9.0 Pin Descriptions (Continued)Symbol Pin # Type FunctionREMOTE2− 21 Remote ThermalDiode_2 - Input(CPU2 THERMDC)This is the negative input (current s

Symbol Pin # D1 D2 D4 D5 D6 SNP R1AD_IN1 23 UUUUUAD_IN2 24 UUUUUAD_IN3 25 UUUUUAD_IN4 26 UUUUUAD_IN5 27 UUUUUAD_IN6 28 UUUUUAD_IN7 29 UUUUUAD_IN8 30 U

Note 15: Timing specifications are tested at the TTL logic levels, VIL= 0.4V for a falling edge and VIH= 2.4V for a rising edge. TRI-STATE output volt

20.0 Physical Dimensions inches (millimeters) unless otherwise noted56-Lead Molded TSSOP Package,JEDEC Registration Number MO-153 Variation EE,Order N