Rainbow-electronics MAX1126 Instrukcja Użytkownika Pobierz pdf (Strona 16)

MAX1126

Quad, 12-Bit, 40Msps, 1.8V ADC with

Serial LVDS Outputs

16 ______________________________________________________________________________________

LVDS/SLVS

OUTPUT

DRIVERS

REFERENCE

SYSTEM

PLL

CLOCK

CIRCUITRY

POWER CONTROL

REFIO

INTREF

IN0P

IN0N

IN1P

IN1N

IN2P

IN2N

IN3P

IN3N

CLK

PDALL PD0 PD1 PD2 PD3

OUT0P

OUT0N

OUT1P

OUT1N

OUT2P

OUT2N

OUT3P

OUT3N

CLKOUTP

CLKOUTN

GND

DD PLL3PLL0 PLL1 PLL2

T/B

LVDSTEST

FRAMEP

FRAMEN

OUTPUT

CONTROL

MAX1126

T/H

12-BIT

PIPELINE

ADC

12:1

SERIALIZER

T/H

12-BIT

PIPELINE

ADC

12:1

SERIALIZER

T/H

12-BIT

PIPELINE

ADC

12:1

SERIALIZER

T/H

12-BIT

PIPELINE

ADC

12:1

SERIALIZER

SLVS/LVDS

Functional Diagram

PIN NAME FUNCTION

LVDSTEST

LVDS Test Pattern Enable Input. Drive LVDSTEST high to enable the output test pattern

(000010111101 MSB→LSB). As with the analog conversion results, the test pattern data is output LSB

first. Drive LVDSTEST low for normal operation.

66 REFIO

Reference Input/Output. For internal reference operation (INTREF = GND), the reference output

voltage is 1.24V. For external reference operation (INTREF = AV

), apply a stable reference voltage

at REFIO. Bypass to GND with a 0.1µF capacitor.

67 INTREF

Internal/External Reference Mode Select Input. For internal reference mode, connect INTREF directly

to GND. For external reference mode, connect INTREF directly to AV

—EP

Exposed Paddle. EP is internally connected to GND. Externally connect EP to GND to achieve

specified performance.

Pin Description (continued)

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 24 25

Serial LVDS Outputs 1

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