
MAX1510
Low-Voltage DDR Linear Regulator
_______________________________________________________________________________________ 3
Note 1: Limits are 100% production tested at T
A
= +25°C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical-quality-control (SQC) methods.
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 1.8V, V
CC
= 3.3V, V
REFIN
= V
OUTS
= 1.25V, SHDN = V
CC
, circuit of Figure 1, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
REFERENCE
REFIN Voltage Range V
REFIN
0.5 1.5 V
REFIN Input Bias Current I
REFIN
-1 +1 µA
REFIN Undervoltage-Lockout
Voltage
Rising edge, hysteresis = 75mV 0.35 0.45 V
REFOUT Voltage V
REFOUT
V
CC
= 3.3V, I
REFOUT
= 0
V
REFIN
-0.01
V
REFIN
V
REFIN
+0.01
V
REFOUT Load Regulation ∆V
REFOUT
I
REFOUT
= ±5mA -20 +20 mV
FAULT DETECTION
Thermal-Shutdown Threshold T
SHDN
Rising edge, hysteresis = 15°C +165 °C
V
CC
Undervoltage-Lockout
Threshold
V
UVLO
Rising edge, hysteresis = 100mV 2.45 2.55 2.65 V
IN Undervoltage-Lockout
Threshold
Rising edge, hysteresis = 55mV 0.9 1.1 V
Current-Limit Threshold I
LIMIT
1.8 3 4.2 A
Soft-Start Current-Limit Time t
SS
200 µs
INPUTS AND OUTPUTS
PGOOD Lower Trip Threshold
With respect to feedback threshold,
hysteresis = 12mV
-200 -150 -100 mV
PGOOD Upper Trip Threshold
With respect to feedback threshold,
hysteresis = 12mV
100 150 200 mV
PGOOD Propagation Delay t
PGOOD
OUTS forced 25mV beyond PGOOD trip
threshold
51035µs
PGOOD Startup Delay
Startup rising edge, OUTS within ±100mV of
the feedback threshold
1 2 3.5 ms
PGOOD Output Low Voltage I
SINK
= 4mA 0.3 V
PGOOD Leakage Current I
PGOOD
OUTS = REFIN (PGOOD high impedance),
PGOOD = V
CC
+ 0.3V
1µA
Logic high 2.0 V
SHDN Logic Input Threshold
Logic low 0.8 V
SHDN Logic Input Current SHDN = V
CC
or GND -1 +1 µA
Komentarze do niniejszej Instrukcji