Rainbow-electronics T89C5115 Instrukcja Użytkownika Pobierz pdf (Strona 82)

T89C5115

4128A–8051–04/02

Registers Table 55. ADCF Register

ADCF (S:F6h)

ADC Configuration

Reset Value = 0000 0000b

Table 56. ADCON Register

ADCON (S:F3h)

ADC Control Register

Reset Value = X000 0000b

76543210

CH 7 CH 6 CH 5 CH 4 CH 3 CH 2 CH 1 CH 0

Bit

Number

Bit

Mnemonic Description

7-0 CH 0:7

Channel Configuration

Set to use P1.x as ADC input.

Clear to use P1.x as standart I/O port.

76543210

- PSIDLE ADEN ADEOC ADSST SCH2 SCH1 SCH0

Bit

Number

Bit

Mnemonic Description

6 PSIDLE

Pseudo Idle mode (best precision)

Set to put in idle mode during conversion

Clear to convert without idle mode.

5ADEN

Enable/Standby Mode

Set to enable ADC

Clear for Standby mode (power dissipation 1 uW).

4ADEOC

End Of Conversion

Set by hardware when ADC result is ready to be read. This flag can generate an

interrupt.

Must be cleared by software.

3 ADSST

Start and Status

Set to start an A/D conversion.

Cleared by hardware after completion of the conversion

2-0 SCH2:0

Selection of channel to convert

see Table 54

1 2 ... 77 78 79 80 81 82 83 84 85 86 87 ... 104 105

T89C5115 1
4128A–8051–04/02 /xM 105

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