16
4931C–AUTO–09/06
ATA6824 [Preliminary]
3 Reset and Watchdog
3.1
V
CC
threshold voltage
level for /RESET
VMODE = “H”
(VMODE = “L”)
29 V
tHRESH
4.9
(3.25)
VA
3.1a
Tracking of reset
thres-hold with regulated
output voltage
VMODE = “H”
(VMODE = “L”)
29 V
CC1-VtHRESH
100
(70)
mV A
3.2
V
CC
threshold voltage
level for /RESET
VMODE = “H”
(VMODE = “L”)
29 V
tHRESL
4.3
(2.86)
VA
3.3
Hysteresis of /RESET
level
(4)
29 HYS
RESth
0.2 V A
3.4
Length of pulse at
/RESET pin
(5)
5t
res
6800 T
100
A
3.5
Length of short pulse at
/RESET pin
(5)
5t
resshort
200 T
100
A
3.6
Wait for the first WD
trigger
(5)
5t
d
6800 T
100
A
3.7
Time for VCC < V
tHRESL
before activating /RESET
(4)
29 t
delayRESL
0.5 2 µs C
3.8
Resistor defining internal
bias currents for
watchdog oscillator
3R
RWD
10 91 kΩ D
3.9
Watchdog oscillator
period
R
RWD
= 33 kΩ 3T
OSC
11.09 13.55 µs A
3.10
Watchdog oscillator
period with internal
resistor
T
OSC_start
16 24 µs A
3.11
Watchdog input
low-voltage threshold
6V
ILWD
0.3 ×
V
VCC
VA
3.12
Watchdog input
high-voltage threshold
6V
IHWD
0.7 ×
V
VCC
VA
3.13
Hysteresis of watchdog
input voltage threshold
6V
hysWD
1VA
3.14 Close window
(5)
t1
980 ×
T
OSC
A
3.15 Open window
(5)
t2
780 ×
T
OSC
A
3.16
Output low-voltage of
/RESET
At I
OLRES
= 1 mA 5 V
OLRES
0.4 V A
10. Electrical Characteristics (Continued)
All parameters given are valid for 7V ≤ VBAT ≤ 18V and for –40°C ≤ϑambient ≤ 150°C unless stated otherwise.
No. Parameters Test Conditions Pin Symbol Min Typ Max Unit Type*
* Type: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. EN, DIR, PWM = high
2. The use of X7R material is recommended
3. For higher values, stability at zero load is not guaranteed
4. Tested during qualification only
5. Value depends on T
OSC
; function tested with digital test pattern
6. Tested during characterization only
7. Supplied by charge pump
8. See section “Cross Conduction Time”
9. Voltage between source-drain of external switching transistors in active case
10. The short-circuit message will never be generated for switch-on time < t
sc
(17 strony)
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