Rainbow-electronics W90P710CDG Instrukcja Użytkownika Pobierz pdf (Strona 382)

100

101

W90P710CD/W90P710CDG

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BITS DESCRIPTIONS

[6:2]

Vector

When the AIC generates the interrupt, VECTOR represents the

interrupt channel number that is active, enabled, and has the highest

priority. If the representing interrupt channel possesses a priority level

0, then the interrupt asserted is FIQ; otherwise, it is IRQ. The value of

VECTOR is copied to the register AIC_ISNR thereafter by the AIC.

This register was restored a value 0 after it was read by the interrupt

handler. This register can help indexing into a branch table to quickly

jump to the corresponding interrupt service routine.

VECTOR [6:2]: Interrupt Vector

0 = no interrupt occurs

1 ~ 31 = representing the interrupt channel that is active, enabled, and

having the highest priority

[0]

Reserved

AIC Interrupt Source Number Register (AIC_ISNR)

AIC_ISNR

0xFFF8_2110

Interrupt Source Number Register

0x0000_0000

31 30 29 28 27 26 25 24

0 0 0 0 0 0 0 0

23 22 21 20 19 18 17 16

0 0 0 0 0 0 0 0

15 14 13 12 11 10 9 8

0 0 0 0 0 0 0 0

7 6 5 4 3 2 1 0

0 0 0 IRQID

BITS DESCRIPTIONS

[31:5]

Reserved Reserved

[4:0]

IRQID

The purpose of this register is to record the interrupt channel number

that is active, enabled, and has the highest priority.

IRQID [4:0]: IRQ Identification

Stands for the interrupt channel number

1 2 ... 377 378 379 380 381 382 383 384 385 386 387 ... 551 552

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