Rainbow-electronics ATmega128L Instrukcja Użytkownika Pobierz pdf (Strona 229)

100

101

229

ATmega128(L)

2467B–09/01

Figure 113. ADC Power Connections

Offset Compensation

Schemes

The gain stage has a built-in offset cancellation circuitry that nulls the offset of differen-

tial measurements as much as possible. The remaining offset in the analog path can be

measured directly by selecting the same channel for both differential inputs. This offset

residue can be then subtracted in software from the measurement results. Using this

kind of software based offset correction, offset on any channel can be reduced below

one LSB.

ADC Accuracy Definitions An n-bit single-ended ADC converts a voltage linearly between GND and V

REF

in 2

steps (LSBs). The lowest code is read as 0, and the highest code is read as 2

-1.

Several parameters describe the deviation from the ideal behavior:

• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal

transition (at 0.5 LSB). Ideal value: 0 LSB.

VCC

GND

100nF

Analog Ground Plane

(ADC0) PF0

(ADC7) PF7

(ADC1) PF1

(ADC2) PF2

(ADC3) PF3

(ADC4) PF4

(ADC5) PF5

(ADC6) PF6

AREF

GND

AVCC

6161

6262

6363

6464

PEN

(AD0) PA0

µΗ

1 2 ... 224 225 226 227 228 229 230 231 232 233 234 ... 330 331

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