General DescriptionThe MAX1361/MAX1362 low-power, 10-bit, 4-channel,analog-to-digital converters (ADCs) feature a digitallyprogrammable window compara
MAX1361/MAX1362Power SupplyThe MAX1361 (2.7V to 3.6V) and MAX1362 (4.5V to5.5V) operate from a single supply and consume670µA (typ) at sampling rates
where RSOURCEis the analog-input source impedance,RIN= 2.5kΩ, and CIN= 22pF. For internal clock mode,tACQ= 1.5 / fSCL, and for external clock mode tAC
MAX1361/MAX1362be addressed with a read command to obtain new con-version results.External ClockSee the Configuration/Setup Bytes (Write Cycle) sectio
To generate a not-acknowledge condition, the receiverallows SDA to be pulled high before the rising edge ofthe acknowledge-related clock pulse, and le
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response14 _____________________________________________
return to F/S mode. Use a repeated START condition(Sr) in place of a STOP condition to leave the busactive and the mode unchanged.Software Description
MAX1361/MAX1362Reading a Conversion (Read Cycle)Initiate a read cycle to start a conversion sequence andto obtain conversion results. See the Scan Mod
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with Programmable____________________________________________________________________________________
MAX1361/MAX1362contains D7–D0. To read the next conversion result,issue an ACK. To stop reading, issue a NACK.When the MAX1361/MAX1362 receive a NACK,
A 1 written to the reset alarm CH_ clears the alarm, oth-erwise no action occurs (Table 10). Deassert INT byclearing all alarms or by initiating an SM
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response2 ______________________________________________
MAX1361/MAX1362To disable alarming on a specific channel, set the lowerthreshold to 0x800 and the upper threshold to 0x7FF forbipolar mode, or set the
Resetting AlarmReset alarms by writing to monitor-setup data. See theConfiguring Monitor Mode section and Table 10.SMBus AlertThe SMBus-alert feature
MAX1361/MAX1362MAX1361/MAX1362’s INL is measured using the end-point method.Differential NonlinearityDifferential nonlinearity (DNL) is the difference
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response________________________________________________
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert ResponseMaxim cannot assume responsibility for use of an
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response________________________________________________
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response4 ______________________________________________
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response________________________________________________
Typical Operating Characteristics(VDD= 3.3V (MAX1361), VDD= 5V (MAX1362), fSCL= 1.7MHz, external clock, fSAMPLE= 94.4ksps, single-ended, unipolar, TA=
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response________________________________________________
MAX1361/MAX13624-Channel, 10-Bit, System Monitor with ProgrammableTrip Window and SMBus Alert Response8 ______________________________________________
Detailed DescriptionThe MAX1361/MAX1362 4-channel ADCs use succes-sive-approximation conversion techniques and fully dif-ferential input track/hold (T
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