Rainbow-electronics T89C51CC02 Instrukcja Użytkownika Pobierz pdf (Strona 124)

124 Rev.A - May 17, 2001

Preliminary

T89C51CC02

IEN1 (S:E8h)

Interrupt Enable Register

Reset Value: xxxx x000b

bit addressable

Figure 128. IE0 Register

7 6 5 4 3 2 1 0

- - - - ETIM EADC ECAN

Bit Number Bit Mnemonic Description

7-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

6-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

5-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

4-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

2 ETIM

TImer overrun Interrupt Enable bit

Clear to disable the timer overrun interrupt.

Set to enable the timer overrun interrupt.

1 EADC

ADC Interrupt Enable bit

Clear to disable the ADC interrupt.

Set to enable the ADC interrupt.

0 ECAN

CAN Interrupt Enable bit

Clear to disable the CAN interrupt.

Set to enable the CAN interrupt.

1 2 ... 119 120 121 122 123 124 125 126 127 128 129 ... 136 137

T89C51CC02 1

Komentarze do niniejszej Instrukcji

Brak uwag