Rainbow-electronics T89C51CC02 Instrukcja Użytkownika Pobierz pdf (Strona 87)

Rev.A - May 17, 2001 87

Preliminary

T89C51CC02

CANBT1 (S:B4h)

CAN Bit Timing Registers 1

Note:

The CAN controller bit timing registers must be accessed only if the CAN controller is disabled with the ENA bit of the CANGCON register set to 0.

See Figure 60.

No default value after reset.

Figure 74. CANBT1 Register

7 6 5 4 3 2 1 0

- BRP 5 BRP 4 BRP 3 BRP 2 BRP 1 BRP 0 -

Bit Number Bit Mnemonic Description

Reserved

The value read from this bit is indeterminate. Do not set this bit.

6-1 BRP5:0

Baud rate prescaler

The period of the CAN controller system clock Tscl is programmable and determines the individual

bit timing.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Tscl

BRP 5…0[]1+

Fcan

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1 2 ... 82 83 84 85 86 87 88 89 90 91 92 ... 136 137

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Rainbow-electronics T89C51CC02 Instrukcja Użytkownika Strona 87