Rainbow-electronics ATmega103L Instrukcja Użytkownika Pobierz pdf (Strona 18)

ATmega603/103

Figure 21. Single Cycle ALU Operation

The internal data SRAM access is performed in two System Clock cycles as described in Figure 22.

Figure 22. On-Chip Data SRAM Access Cycles

See “Interface to external SRAM” on page 72 for a description of the access to the external SRAM.

System Clock Ø

Total Execution Time

ALU Operation Execute

Result Write Back

T1 T2 T3 T4

System Clock Ø

Data

Address

T1 T2 T3 T4

Prev. Address

Read Write

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 125 126

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Rainbow-electronics ATmega103L Instrukcja Użytkownika Strona 18