
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 315 - Revision B2
BITS DESCRIPTIONS
[31:0]
AUDIO_RDSTB[31:0]
32-bit record destination base address
The AUDIO_RDSTB[31:0] bits is read/write.
DMA destination end address (ACTL_RDST_LENGTH)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_RDST_LENGTH
0xFFF0_900C R/W
DMA record destination address
length
0x0000_0000
The value in ACTL_RDST_LENGTH register is the record destination address length of DMA, and the
register could only be changed by CPU.
31 30 29 28 27 26 25 24
AUDIO_RDSTB[31:24]
23 22 21 20 19 18 17 16
AUDIO_RDSTB[23:16]
15 14 13 12 11 10 9 8
AUDIO_RDSTB[15:8]
7 6 5 4 3 2 1 0
AUDIO_RDSTB[7:0]
31 30 29 28 27 26 25 24
AUDIO_RDST_L[31:24]
23 22 21 20 19 18 17 16
AUDIO_RDST_L[23:16]
15 14 13 12 11 10 9 8
AUDIO_RDST_L[15:8]
7 6 5 4 3 2 1 0
AUDIO_RDST_L[7:0]
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