Rainbow-electronics ATmega128RFA1 Instrukcja Użytkownika Pobierz pdf (Strona 399)

399

8266A-MCU Wireless-12/09

ATmega128RFA1

Figure 25-18. Formats and States in the Slave Transmitter Mode

S SLA R A DATA A

$A8 $B8

$B0

Reception of the own

slave address and one or

more data bytes

Last data byte transmitted.

Switched to not addressed

slave (TWEA = ’0’)

Arbitration lost as master

and addressed as slave

From master to slave

From slave to master

Any number of data bytes

and their associated acknowledge bits

This number (contained in TWSR) corresponds

to a defined state of the Two-Wire Serial Bus. The

prescaler bits are zero or masked to zero

P or SDATA

$C0

DATA A

$C8

P or SAll 1’s

25.7.5 Miscellaneous States

There are two status codes that do not correspond to a defined TWI state, see Table

25-7 below.

Status 0xF8 indicates that no relevant information is available because the TWINT Flag

is not set. This occurs between other states, and when the TWI is not involved in a

serial transfer.

Status 0x00 indicates that a bus error has occurred during a 2-wire Serial Bus transfer.

A bus error occurs when a START or STOP condition occurs at an illegal position in the

format frame. Examples of such illegal positions are during the serial transfer of an

address byte, a data byte, or an acknowledge bit. When a bus error occurs, TWINT is

set. To recover from a bus error, the TWSTO Flag must set and TWINT must be

cleared by writing a logic one to it. This causes the TWI to enter the not addressed

Slave mode and to clear the TWSTO Flag (no other bits in TWCR are affected). The

SDA and SCL lines are released, and no STOP condition is transmitted.

Table 25-7. Miscellaneous States

Application Software Response

To TWCR

Status Code

(TWSR)

Prescaler

Bits are 0

Status of the 2-wire

Serial Bus and 2-wire

Serial Interface Hard-

ware

To/from TWDR

STA STO TWINT TWEA

Next Action Taken by TWI

Hardware

0xF8 No relevant state

information available

TWDR action No TWCR action Wait or proceed current transfer

0x00 Bus error due to an illegal

START or STOP condition

No TWDR action 0 1 1 X Only the internal hardware is

affected, no STOP condi-tion is sent

on the bus. In all cases, the bus is

released and TWSTO is cleared.

25.7.6 Combining Several TWI Modes

In some cases, several TWI modes must be combined in order to complete the desired

action. Consider for example reading data from a serial EEPROM. Typically, such a

transfer involves the following steps:

1. The transfer must be initiated.

2. The EEPROM must be instructed what location should be read.

1 2 ... 394 395 396 397 398 399 400 401 402 403 404 ... 523 524

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