Rainbow-electronics ATmega128RFA1 Instrukcja Użytkownika Pobierz pdf (Strona 448)

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8266A-MCU Wireless-12/09

ATmega128RFA1

• Bit 4 – JTRF - JTAG Reset Flag

This bit is set if a reset is being caused by a logic one in the JTAG Reset Register

selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset,

or by writing a logic zero to the flag.

29.7 Boundary-scan Description Language Files

Boundary-scan Description Language (BSDL) files describe Boundary-scan capable

devices in a standard format used by automated test-generation software. The order

and function of bits in the Boundary-scan Data Register are included in this description.

BSDL files are available for ATmega128RFA1.

29.8 ATmega128RFA1 Boundary-scan Order

Table 29-1 on page 449 shows the Scan order between TDI and TDO when the

Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in,

and the first bit scanned out. The scan order follows the pin-out order. In Figure 29-3 on

page 445, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4,

5, 6 and 7 of Port F is not in the scan chain, since these pins constitute the TAP pins

when the JTAG is enabled.

1 2 ... 443 444 445 446 447 448 449 450 451 452 453 ... 523 524

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