Rainbow-electronics ATmega8515L Instrukcja Użytkownika Pobierz pdf (Strona 111)

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ATmega8515(L)

2512A–AVR–04/02

TheTimer/CounterOverflowFlag (TOV1) isset each time the counterreachesBOT-

TOM. When eitherOCR1A orICR1 is usedfordefining theTOPvalue, the OC1A or

ICF1 flag isset accordingly at the same timerclock cycleas the OCR1xregisters are

updatedwith the double buffer value (at TOP).Theinterrupt flagscan beused to gener-

ateaninterrupteach time the counterreaches theTOPorBOTTOM value.

When changing theTOPvalue the program mustensurethat thenew TOPvalue is

higher or equal to thevalue of all of the compare registers. If theTOPvalue islower

than any of the compare registers, a comparematch will never occurbetween the

TCNT1 and the OCR1x. Note that when using fixed TOPvalues, the unusedbits are

masked to zero when any of the OCR1x Registers are written. As thethird periodshown

in Figure53 illustrates, changing theTOPactively whiletheTimer/Counter isrunning in

the phase correctmode can resultinanunsymmetrical output. The reason for thiscan

be found in thetimeof update of the OCR1x Register. Sincethe OCR1x update occurs

at TOP, thePWM periodstarts and ends at TOP. This implies that the length of the fall-

ing slopeisdeterminedbythe previous TOPvalue,whilethe length of the rising slopeis

determinedbythenew TOPvalue. When thesetwovaluesdiffer thetwo slopes of the

periodwill differ in length.The differenceinlength gives theunsymmetricalresultonthe

output.

Itisrecommended to usethe phaseandfrequency correctmodeinstead of the phase

correctmode when changing theTOPvalue whiletheTimer/Counter isrunning. When

using a static TOPvalue thereare practically no differencesbetween thetwomodes of

operation.

In phase correctPWM mode, the compareunits allow generation of PWM waveforms on

the OC1xpins. Setting the COM1x1:0 bits to 2 will produce a non-inverted PWM and an

inverted PWM output can begeneratedbysetting the COM1x1:0to3(See Table1on

page 117).TheactualOC1x value will only bevisibleonthe port pin if the data direction

for the port pin isset as output (DDR_OC1x).ThePWM waveformis generatedbyset-

ting (orclearing) the OC1x Register at the comparematch between OCR1x and TCNT1

when the counter increments, andclearing (orsetting) the OC1x Register at compare

match between OCR1x and TCNT1 when the counterdecrements.ThePWM frequency

for theoutput when using phase correctPWM can be calculatedbythe following

equation:

The N variable represents the prescalerdivider(1, 8,64, 256, or 1024).

Theextreme valuesfor the OCR1x Registerrepresent specialcaseswhen generating a

PWM waveformoutput in the phase correctPWM mode. If the OCR1x isset equal to

BOTTOM the output will be continuously low and ifset equal to TOPtheoutput will be

continuously highfor non-inverted PWM mode. For inverted PWM theoutput will have

theopposite logic values.

OCnxPCPWM

clk_I/O

2 NTOP⋅⋅

----------------------------=

1 2 ... 106 107 108 109 110 111 112 113 114 115 116 ... 222 223

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