
9
ATmega8515(L)
2512A–AVR–04/02
• Bit0–C:CarryFlag
The Carry Flag C indicates a carry in an arithmetic orlogic operation. See the“Instruc-
tion Set Description” fordetailed information.
General Purpose
Register File
TheRegisterFileis optimizedfor the AVR Enhanced RISC instruction set. Inorder to
achieve the requiredperformanceandflexibility, the following input/output schemes are
supportedbythe RegisterFile:
• One 8-bit output operand and one 8-bit resultinput
•Two8-bit output operands and one 8-bit resultinput
•Two8-bit output operands and one 16-bit resultinput
• One 16-bit output operand and one 16-bit resultinput
Figure4shows the structureof the 32 generalpurpose working registers in the CPU.
Figure 4. AVR CPUGeneral Purpose Working Registers
Mostof theinstructions operatingonthe RegisterFile have directaccess to all registers,
and mostof them are single cycleinstructions.
AsshowninFigure4, each register is alsoassigned a data memory address, mapping
them directly into the first 32 locations of theuserData Space. Although not being phys-
ically implemented asSRAMlocations, this memory organization provides great
flexibility in access of the registers, as the X-, Y-, andZ-pointer Registers can be set to
index anyregister in the file.
7 0Addr.
R0 $00
R1 $01
R2 $02
…
R13$0D
General R14 $0E
PurposeR15$0F
Working R16$10
Registers R17$11
…
R26$1A X-registerLowByte
R27$1BX-registerHighByte
R28 $1CY-registerLowByte
R29$1DY-registerHighByte
R30 $1EZ-registerLowByte
R31 $1FZ-registerHighByte
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