15
ATmega8515(L)
2512A–AVR–04/02
SRAM Data Memory Figure 9shows how the ATmega8515 SRAMMemory is organized.
The lower608 Data Memory locations address theRegisterFile, the I/OMemory, and
theinternaldata SRAM.The first 96 locations address the RegisterFileandI/OMem-
ory, and thenext 512 locations address theinternaldata SRAM.
An optional externaldata SRAMcan beusedwith the ATmega8515. ThisSRAMwill
occupy an area in the remaining address locations in the 64K address space. This area
starts at theaddress following theinternalSRAM.TheRegisterfile,I/O, ExtendedI/O
andInternalSRAM occupies the lowest 608 bytes in normal mode,so when using 64KB
(65536 bytes) ofExternalMemory, 64928 Bytes ofExternalMemory areavailable. See
“ExternalMemory Interface” on page 22 fordetails on how to takeadvantage of the
external memory map.
When theaddresses accessing the SRAM memory spaceexceeds theinternaldata
memory locations, theexternaldata SRAM is accessed using the same instructions as
for theinternaldata memory access. When theinternaldata memories areaccessed,
the read andwrite strobe pins(PD7 and PD6) areinactive during the wholeaccess
cycle. ExternalSRAM operation is enabledbysetting the SREbit in the MCUCR
register.
Accessing externalSRAM takes one additionalclock cycle perbyte compared to access
of theinternalSRAM.This means that the commands LD, ST,LDS,STS, LDD, STD,
PUSH, and POPtakeoneadditionalclock cycle. If the Stack isplaced in external
SRAM, interrupts, subroutine calls andreturns takethree clock cycles extra becausethe
two-byte program counter ispushed andpopped, and external memory access does not
takeadvantage of theinternalpipe-line memory access. When externalSRAM interface
is usedwithwait-state, one-byte external access takes two, three, orfour additional
clock cyclesfor one, two, and three wait-statesrespectively. Interrupts, subroutine calls
andreturnswill needfive,seven, or nine clock cycles morethan specified in theinstruc-
tion set manualfor one, two, and three wait-states.
The five different addressing modesfor the data memory cover: Direct,Indirect withDis-
placement,Indirect,Indirect with Pre-decrement, andIndirect with Post-increment. In
the Registerfile,registers R26 to R31 featuretheindirectaddressing pointerregisters.
The directaddressing reaches theentire data space.
The Indirect withDisplacement mode reaches63address locationsfrom the base
address given by the Y- orZ-register.
When using register indirectaddressing modeswith automaticpre-decrement andpost-
increment, theaddress registers X, Y, andZare decremented or incremented.
The 32 generalpurpose working registers, 64 I/Oregisters, and the 512 bytes of internal
data SRAM in the ATmega8515 areall accessiblethrough all theseaddressing modes.
The Registerfileisdescribed in “General Purpose RegisterFile” on page 9.
(24 strony)
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